These 3 basic topologies are based upon the classic designs known as (from left to right) common emitter common base and common collector but with a few twists. The uncommon thing about the first circuit is that the bias design enables the transistor to enter a stable temp state and work in a safe bias zone. The advantages are: Greater reliability than other designs. Higher temperature stability than other designs.The twist on the second circuit is the emitter decoupling capacitor. Usually in the most simple case the signal source is not decoupled in any way and the DC passes freely through it. Simply a resistor in series limits the current to some point but DC through the signal source is NEVER good. And now the most bizzare topology of all. Remember how in books the common collector circuits are said to always have A voltage gain less than one Ku<1? Usually this is true but by simply eliminating the negative feedback you get voltage gain as well, that almost becomes independent from the transistor hfe.
