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EDIT: new and improved version with 2 major changes:
- the circuit now has *two* pipelined modular multipliers and produces two independent random bitstreams. The circuit is therefore two times faster.
- the circuit now includes a "kick in the nuts" bootstrap circuit (the two NPN BJTs at the bottom) to prevent it from getting stuck at zero volts overall (without this, zero is a fixed point of the loop). Not particularly useful in a simulator, but indispensable IRL: with the bootstrap, the circuit is sure-start and can easily be pushed in the MHz range, even with cheapo jellybean components.
Original description:
This is a neat little hardware random number generator that does *not* use the traditional reverse biased PN junction trick but uses switched capacitors instead.
At every clock tick, the voltage on both switched caps changes to a new random value between 0 and 5V, and the voltage outputs of the lower opamps (comparators) are two new random bits.
Theory of operation: the circuit is driven by two complementary clocks that control two switches (here we use relays, this app doesn't provide analog mux ics). The two switches in turn control the charging of the two switched capacitors.
When a cap is connected by its switch (sample mode), it "reads" and "stores" its input voltage. When disconnected (hold mode), it "writes" that voltage to the opamps downstream of it.
The open loop opamps at the bottom are used as comparators: they output 5v if input signal is larger than 2.5v, else 0v. They serves the dual purpose of bitifying the RNG output as well as providing a useful signal to the modular multiplier opamps on top.
The opamps at the top are the heart of the circuit: they compute an analog modular multiplication of their input signal, using the output of the comparator below to do the modulo when needed (i.e. when output of the multiplication would go above 5v, 5v is subtracted).
The result of the modular multiplication is then fed back in the other section of the circuit for further processing.
The net result is that the circuit more or less computes an infinite binary decomposition of an analog voltage value, delving deep into the noise floor.
The sure-start portion at the bottom "triggers" when the signal coming out of the first modmult goes below a diode drop and forces the output of the second modmult to increase. This way, the circuit never goes too close to zero.
A very nice example of an analog/digital hybrid circuit.
Slow down time to understand how it works (see data travel through the loop)
Note that the bitstream generated does not have a uniform distribution (some bit patterns are more likely than others, especially if the opamp isn't rail to rail) and therefore can't be used directly for crypto or Monte-Carlo integration,. However, the stream is good enough to feed to a software whitener and get a very strong RNG.
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